| 摘要 |
PURPOSE:To enhance a productivity by a method wherein a subboard at the lowermost layer is exposed partially to the outside and a via hole which is connected, via an interconnection pattern, to a wire-connecting face of the same height as a pad face of a semiconductor chip is made at the externally exposed part in the subboard. CONSTITUTION:One part of a subboard 11 at the lowermost layer out of subboards 11 to 14 which are laminated on a main board 3 and which have been installed around a semiconductor chip 2 is exposed to the outside; a plurality of wire-connecting faces 11a whose height is the same as that of pad faces 2a are formed; they are connected by using wires 9. On the other hand, a plurality of via holes 15, 16 for interlayer connection use are made in the other subboards 12 to 14; they are connected to the individual wire-connecting faces 11a via conductor patterns 17, 18 on the subboard 11. Consequently, end parts of the individual wires 9 which connect the pad faces 2a of the semiconductor chip to the wire-connecting faces of the subboard can be set in such a way that distances in the vertical direction and the horizontal direction which are moved at a wire bonding operation are equal. Thereby, the wire bonding operation can be automated simply and a productivity can be enhanced surely. |
