发明名称 METHOD OF SELECTING INTEGRATED CIRCUIT HAVING CONTINUOUS TROUBLE
摘要 PURPOSE: To detect a floating gate integrated circuit that is designed so that a trouble due to early breakdown of a tunnel dielectric can be generated at an early stage by predicting the life of the integraged circuit from at least one of the type of the program distribution and the type of erasure distribution of the integrated circuit related to an EPROM. CONSTITUTION: A first element includes a source region 12 and a drain region 11 on a p-type silicon substrate 10, and a channel is formed at a region between the source region 12 and the drain region 11. Then, one of the characteristic of a program distribution and an erasure distribution is first measured for a target IC, and the threshold voltage of each element is determined with respect to the continuous increase of a control gate voltage to be added, and the measurement is performed. The number of elements that are turned on is recorded for each gate voltage, than a center threshold voltage is calculated, and the number of cells is counted at the gate turn-on voltage point where erasure tail begins to be formed. Distribution characteristic measured by it is used, and a correlation relationship determined for the initial sample of a similar IC is utilized, thus estimating the durability of the IC.
申请公布号 JPH03195060(A) 申请公布日期 1991.08.26
申请号 JP19900326080 申请日期 1990.11.29
申请人 INTEL CORP 发明人 NIIRU AARU MAIRUKU
分类号 H01L21/8247;G11C29/50;H01L21/66;H01L27/10;H01L27/115;H01L29/788;H01L29/792 主分类号 H01L21/8247
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