| 摘要 |
The correlator possesses an input (E) receiving logic signals to be processed. A periodically triggerable sequencer (LC, OM1, CM1) defines N sub-cycles, each with two primary states, within a cycle, N being a predetermined integer. A circulating work memory (MV1) allows direct and continuous access of the signals to be processed. The correlator generates (GP) a set of pointers, serving as relative representation of instants of control at which a reference logic sequence takes one, chosen, of the two possible logic states. The circuits (CAM) for access to the work memory react to the first primary state by instructing the storage in work memory of at least one new sample of the input logic signal, in circulating mode, whilst they react to the second primary state by sequentially exploring the direct access work memory, at locations corresponding to the relative positions of the said pointers, shifted selectively as a function of the rank of the sub-cycle in progress. Processing means (MT) operate during the second primary state in order to count the number of times the work memory contains said chosen logic state, in each sub-cycle. The temporal shift between the logic signals received and the reference sequence is represented by the rank of the sub-cycle which gave the highest count. <IMAGE>
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