| 摘要 |
<p>PURPOSE:To realize a clock recovering circuit with large noise immunity by adding a shift circuit and an OR circuit to a conventional circuit to reduce the indefinite element of a tank circuit without addition of special CMOS or TTL or the like. CONSTITUTION:A transmission line equalizing signal is inputted from an input terminal 1A, binarized at a binarization coding circuit 1 and the result is inputted to an OR circuit 3. The output signal of the binarization coding circuit is shifted by one bit at the shift circuit 2 by using a clock synchronizing signal and inputted to other terminal of the OR circuit. The output signal of the OR circuit 3 is given to an integration circuit 4, in which the leading and trailing of the binary code are smoothed, a tank circuit 5 extracts the timing wave to obtain a sinusoidal wave. The output signal is given to a pulse shaping circuit 6, from which a pulse clock signal is outputted. When a mark rate (m) of an input equalizing signal to the clock recovery circuit is very small, since it is considered that the consecutive '1' pulses do not almost exist, the mark rate M of the input signal to the tank circuit 5 is expressed as Mapprox.=2m and the output amplitude level of the tank circuit 5 is nearly twice that in a conventional circuit.</p> |
