发明名称 SEMICONDUCTOR INTERGRATED CIRCUIT
摘要 <p>PURPOSE:To reduce probability of erroneous write by fixing the output signal to a semiconductor memory device before each signal generated when a main power supply is interrupted, is turned to an instable state. CONSTITUTION:A voltage detection circuit 17 monitors the state of a main power source Vcc and outputs the stage while discriminating whether the main power source Vcc is equal to a fixed voltage or higher. When the main power source voltage Vcc is lower than the fixed voltage, an address signal to be inputted to the semiconductor memory device is fixed by a latch 20, a data signal is fixed by a latch 21 and a read/write control signal is fixed by a latch 22 and even when the main power supply Vcc is interrupted, the signal lines of these signals can be prevented from turning to the instable state. Thus, the data of the semiconductor memory device can be protected from the erroneous write caused by the instable state of the control signal line.</p>
申请公布号 JPH03192412(A) 申请公布日期 1991.08.22
申请号 JP19890333101 申请日期 1989.12.22
申请人 SEIKO EPSON CORP 发明人 FUJIWARA YASUHIDE
分类号 G06F1/26 主分类号 G06F1/26
代理机构 代理人
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