发明名称 FIXED DELAY TIME DIFFERENCE ABSORPTION CIRCUIT
摘要 PURPOSE:To absorb a fixed delay time difference automatically by sending a signal corresponding to the presence of a phase difference of a frame pulse at an active side and a standby side, implementing count at the input of a dissidence signal and stopping the count at the input of a coincidence signal. CONSTITUTION:A phase comparator 41 detects the presence of the coincidence of a phase of an active and a standby frame pulse inputted periodically through an active and a standby line and sends a corresponding output to a 2nd count means 31. When a dissidence signal is inputted to the 2nd count means 31, the count operation is implemented and a relevant count is sent to a 1st counter 32 as an initial value, then the count period is decided. The count period corresponds to the absorption quantity corresponding to the fixed delay time difference and while the dissidence signal is inputted, the period varies automatically and the absorption quantity is changed. When the coincidence signal is inputted, since the count is stopped, the initial value is made constant. Thus, the state of in-phase of the frame pulse at the active side and the standby side is kept and the fixed delay time difference is absorbed automatically.
申请公布号 JPH03190439(A) 申请公布日期 1991.08.20
申请号 JP19890330433 申请日期 1989.12.20
申请人 FUJITSU LTD 发明人 UEDA YOICHI
分类号 H03K5/13;H03K5/131;H04L1/22 主分类号 H03K5/13
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