| 摘要 |
PURPOSE:To improve the linearity of an output voltage by receiving the complementary output signal of each differential amplifier at the differential amplifier circuit of an adder circuit, and connecting a bias circuit applying a same bias voltage to each differential amplifier circuit. CONSTITUTION:An adder circuit 11 uses a differential amplifier amplifier circuit 13 to receive the complementary output signal of each differential amplifier 12 respectively, and a bias circuit 14 applying the same bias voltage respectively to each differential amplifier circuit 13 in a signal strength detecting circuit connecting differential amplifiers of plural stages in series and outputting a signal being applied with logarithmic compression to an input signal. Since the complementary output signal outputted from each differential amplifier is received by the differential amplifier respectively, the production of an offset voltage in each differential amplifier is prevented and the output signal of the differential amplifier circuit is obtained by amplifying and applying full wave rectifier to the input signal. Thus, the linearity of the output voltage is improved and the signal strength detection circuit with a rectifier function is obtained. |
