| 摘要 |
PURPOSE:To obtain a memory device, in which TAT can be shortened and MOS transistors can be densely arranged, by a method wherein a groove is provided onto the surface of a semiconductor substrate nearly vertical to a direction in which the MOS transistors are arranged, a gate electrode is formed on the surface of the sidewall of the groove, and impurity is selectively introduced into the sidewall of the groove. CONSTITUTION:A P-type well region 2 is formed on an N-type silicon substrate 1, and straight line grooves 3 parallel with each other are formed on a surface 2a. The sidewall 4 of the groove 3 is nearly vertical to the primary surface of the substrate 1, and the base 5 of the groove 3 is cut parallel to the primary face of the substrate 1. A thick field oxide film 6 used for isolating elements from each other is formed in a belt-shaped pattern sandwiching both the sides of a MOS transistor row. A region surrounded with the field oxide film 6 is made to serve as an active region, and MOS transistors are formed to serve as memory cells respectively. |
