| 摘要 |
<p>PURPOSE:To obtain a device which has a high intetration degree and is capable of erasing a data quickly, by providing an erase gate in parallel with a floating gate of a double gate type MOS transistor, constituting a memory cell of 1 bit portion, and utilizing the field emission when erasing a data. CONSTITUTION:Cells M1-M4 are constituted of a control gate CG an erase gate EG provided in an insulating film between said gate and a substrate, a floating gate FG which is provided in parallel with the gate EG, and whose end prt is overlapped with a part of the gate EG through the insulating film, a source S and a drain D, and are connected with selective lines 35, 36, digit lines 31, 32 and erase lines 33, 34. Also, this cell is constituted so that an electron by field emission from FG cannot be extracted when each potential of CG and EG has been made a high level, and the electron from FG can be extracted when each potential of CG and EG has been made a low level and a high level.</p> |
