AUTOMATIC CORRECTION SYSTEM FOR ERRONEOUS DESIGN OF COMBINATION CIRCUIT,申请号JP19890326982-传众专利搜索

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发明名称	AUTOMATIC CORRECTION SYSTEM FOR ERRONEOUS DESIGN OF COMBINATION CIRCUIT
摘要
申请公布号	JPH03186970(A)	申请公布日期	1991.08.14
申请号	JP19890326982	申请日期	1989.12.15
申请人	FUJITSU LTD	发明人	TSUNODA TAEKO;FUJITA MASAHIRO
分类号	G06F17/50	主分类号	G06F17/50
代理机构		代理人
主权项
地址

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