| 摘要 |
An improved multiplex controller circuit allows fast, on demand allocation of variable length time slots in a voice/data communications system. The controller circuit directly maps a triangular connection matrix into hardware, thereby providing hardware parallelism Each one of the coordinate points of the matrix is implemented with a flip-flop (Lij). The inputs of the flip-flops are provided by a Port Activity Register (PAR), and the outputs of the flip-flops are fed into a Priority Encoder circuit (PE) which generates the address of a switch adapter with which a connection can be established. In this manner, a high speed dynamic allocator of variable length time slots which solves controller bottleneck problems in time critical systems is realized.
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