| 摘要 |
PURPOSE: To reduce a drop time of a node potential level by providing a latching means successively and beforehand dropping a potential level of an inversionϕS node from the potential level lower than bit line charge potential to a ground potential level. CONSTITUTION: When the inversionϕS node potential level of a threshold value voltage or below provided in an N-MOSFET of a sense amplifier is detected on the inversionϕS node by a Schmitt trigger circuit 20, the output inversionϕDS of the circuit 20 becomes an H level signal in a prescribed TAE time section. This signal is applied to the gate terminal of the N-MOSFET Q14 of a latching circuit 10. Then, when the N-MOSFET Q14 is turned on, the N-MOSFET Q19 is turned off, the inversionϕS isn't dropped further in the section TAE. A control signalϕSED becomes H after the section, and when the inversionϕDS becomes L, the MOSFET Q19 is turned on. Thus, the sense operation of the amplifier 3 is performed, and its malfunction is prevented.
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