发明名称 MEMORY READ CIRCUIT
摘要 <p>PURPOSE:To make circuit scale small by always reducing the output change of an address counter to one for designating the read address of a memory. CONSTITUTION:By designating read addresses A0-Am of an address counter 10 composed of N-pieces of FF circuits 11-1N to designate the read address of data written into the memory, the output change of the address is only one at all times and an instable state is not generated.</p>
申请公布号 JPH03183100(A) 申请公布日期 1991.08.09
申请号 JP19890322973 申请日期 1989.12.12
申请人 FUJITSU LTD 发明人 TAKEDA KAZUHIKO
分类号 G11C17/00;G11C11/413 主分类号 G11C17/00
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