Rapid, high resolution D=A converter - measures sequential output signal at high velocity during intermediate matching operation

摘要

The converter processes in normal operation digital input signals (E) in corresponding analog output signals (A). During an intermediate matching operation (22), the output signals are sequentially measured at high velocity. The detected defects are digitalised and stored in a memory (9). The memory address signal is formed by the coarse positions of each digital signal at the input of a D/A converter (1, 2). During normal operation, the memory output signal is fed to a correction D/A converter (3), whose weighted output signal and the output signal of the previous D/A converter are added. ADVANTAGE - Low-cost design for e.g. 16 bits and conversion time below 10 microsec.