发明名称 |
Microcomputer system - has switching stage to reduce power consumption of system peripherals to standby level when operating in reduced mode |
摘要 |
A microcomputer system has a microprocessor module (5) with a CPU (2), internal RAM (10) and a buffer memory (4). All threee units are connected onto an internal bus (3). The module connects with an external bus using a tri-state buffer unit (4a). The external bus supports programme ROM (7), read-write memory (8), I/O units (9) and a stage (11) to reduce the system power consumption. When operating in the reduced mode, switching stages (11a,11b) are actuated to reduce the supplies to the ROm,dROM,RAM and I/O units to a standby level. ADVANTAGE - Has reduced power consumption. |
申请公布号 |
DE4037578(A1) |
申请公布日期 |
1991.08.08 |
申请号 |
DE19904037578 |
申请日期 |
1990.11.26 |
申请人 |
MITSUBISHI DENKI K.K., TOKIO/TOKYO, JP |
发明人 |
OHASHI, SHINICHIRO;YAMADA, KUNIHIRO, ITAMI, HYOGO, JP |
分类号 |
G06F1/32;G06F3/00 |
主分类号 |
G06F1/32 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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