| 摘要 |
The present invention refers to a circuit arrangement of a cellular processor of homogeneous structure and inhomogeneous operation comprising a cellular field (1) consisting of a regular arrangement of cells (3) interconnected by a control bus (24) and a switching network (2) connected to the cells (3) arranged at the edges (N, E, S, W) of the cellular field (1) and to a system bus (23), wherein each cell (3) comprises a maskable equality comparator (10) for associative addressing of other cells (3), the switching network (2) includes inputs and outputs (NI, NO, EI, EO, SI, SO, WI, WO) connectable to respective switching networks (2) of adjacent circuit arrangements (100), means for receiving and processing microcommands (4, 56) and a by-pass circuit (16) for determining and storing a by-pass path between the cells (3), the by-pass circuit (16) consisting of at least four by-pass circuit modules (161, 162, 163, 164) being assigned to the edges (N, E, S, W) and comprising each means for storing and determining (17, 18, 19, 20, 21) a by-pass route forming a part of the by-pass path. It refers also to a cell (3) for realizing the cellular field (1) of the circuit arrangement (100), the cell (3) including an internal state storage, a multiplexer, a maskable equality comparator, having a masking input and a first comparison input, an activating storage, a J-K logic having a J-input and a K-input, a next state storage, and an active layer storage for storing present state connected by the respective inputs to the control bus (24). |
