| 摘要 |
A multi-input logic gate is disclosed having particular application for use as an AND or OR gate in a digital circuit. The OR sate of the present invention includes drive, sense and reference rails. A plurality of input lines are coupled to a gate of a plurality of N-channel transfers disposed between thedrive and sense rails, one input line per transistor. The drive rail is coupled to ground through an N-channel transistor whose gate is controlled by the state of a detect line. The sense and reference rails are coupled to a voltage source (Vdd) through P-channel transistors whose gate is also coupled to the detect line. The P-channel transistor coupled to the sense rail is sized to pass more current than the corresponding transfer on the reference rail. A sense amplifieris coupled to the sense and reference rails, and outputs a predetermined signal as a function of the voltage difference of the rails. In operation, a precharge circuit first precharges the drive, sense and reference rails to a known voltage. Signals are then applied to the inputs and allowed to stabilize. A detect signalis generated which turns on the P-channel transistors coupled to the sense and reference rails, and the N-channel transistor coupled between the drive rail andground. In the event all inputs are low, the sense rail voltage rises faster than that of the reference rail, this voltage difference is sensed by the sense amplifier which outputs a predetermined signal indicating no inputs are high. In the eventthat one or more inputs are high, the corresponding N-channel transfer coupled between the drive rail and the sense rail is turned on, thereby pulling the sense rail toward ground. The sense amplifier senses that the reference rail voltage exceeds that of the sense rail and outputs a signal indicating that at least oneinput is high. The present invention further includes an improved AND gate which permits an efficient determination of whether ail of a multiplicity of inputs are true. |
