| 摘要 |
PURPOSE:To obtain an arithmetic circuit with simple circuit configuration by holding a multiplication result outputted from a multiplier circuit in unit of plural number at a multiplication result holding part by using a single multiplier circuit. CONSTITUTION:A data holding part 10 is comprised by connecting three flip- flops 12, 14 and 16 in sequence, and holds the picture element data of continuous three picture elements, and outputs them to a multiplexer 18 simultaneously. The multiplexer 18 outputs inputted three pieces of picture element data to the multiplier circuit 5 of a multiplication part 72 one by one at a prescribed timing, and a multiplexer 56 selects a multiplier inputted from a multiplication register 58 synchronizing with the timing with which the picture element data is inputted to the multiplier circuit 54. The multiplier circuit 54 performs multipli cation, and outputs a result to the multiplication result holding part 52. The multiplication result holding part 52 holds an inputted multiplication result, and outputs three multiplication results to a selector 74 simultaneously. Thereby, it is possible to realize the processing of the picture element data in constant neighboring unit with a single multiplier circuit, and to improve gate efficiency, and to simplify the circuit configuration. |
