| 摘要 |
PURPOSE:To execute a decimal division at a remarkably high speed, by providing a delay register for holding a carry out of an operator until the next operation cycle, and returning the contents of a divident register to a value before overrun. CONSTITUTION:A divisor X and a dividend b0 are set to a register 110 and 120, respectively, a substraction is executed, and its difference b1 is derived in a register 150. Also, a carry output showing whether b1 is positive or negative is set to a carry register 155. This set value is delayed and is transferred to a delay register 456. Subsequently, the contents b0 of the register 120 are transferred to an output register 160. Subsequently, the contents b1 of the register 150 are set to the register 120 through a gate 720. As a result of the following substrction, b2=b0-2X is obtained by the register 150. In this case, if b2<0, ''0'' is set to the register 155. After that, in the same way, the subtraction is execute, and b3=b0-3X is derived by the register 150, but an output of the register 456 becomes ''0'', it is inhibited to updata the contents of the register 160, and b1 is transferred to the register 120. |
