CLOCK PULESES SELECTION CIRCUIT

摘要

A clock selecting circuit is for improving the reliability of the electronic equipment or the telecommunication system by selecting a mormal clock group between two clock groups. The circuit comprises a receiver (1) for receiving the clock source and for producing two clock groups, a clock detecting/selecting means including a number of clock detectors, four OR gates and a flip-flop, and a selector (2) for transmitting the normal clock corresponding to the enalbe signal.