发明名称 High speed level conversion circuit.
摘要 <p>A input signal is received by a level shift circuit (41) to generate a plurality of level-shifted output signals (A, B,..., A, B,...) which have different shift amounts to each other. A switch circuit (42), selectively outputs the level-shifted output signals in response to a logic level of the input signal. The switch circuit selects a signal having a higher potential from the level-shifted output signals when the logic level of the input signal indicates a first level, and selects a signal having a lower potential from said level-shifted output signals when the logic level of the input signal indicates a second level.</p>
申请公布号 EP0439158(A2) 申请公布日期 1991.07.31
申请号 EP19910100855 申请日期 1991.01.24
申请人 FUJITSU LIMITED;FUJITSU VLSI LIMITED 发明人 SEKI, TERUO
分类号 H03K19/018;H03K17/687;H03K19/0175 主分类号 H03K19/018
代理机构 代理人
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