| 摘要 |
PURPOSE:To improve the manufacturing yield of a semiconductor device by forming the prescribed diffused region in a semiconductor substrat, covering the substrate with an insulating layer, opening a hole, covering the regions with metallic wiring layer contacted with the regions, forming an intermediate insulating layer on the overall surface and selecting a pattern of a resist layer when holes for forming the upper metallic wiring layer are opened. CONSTITUTION:A plurality of P type regions 22 and N type regions 12 having different impurity density from an N type Si substrate 21 are diffused in the substrate 21, an insulating layer 24 such as Si3N4 is covered on the overall surface, holes 25, 26 are opened, and metallic wiring layer 27 contacted with the regions 22, 23 is formed in the hole 25. Then, an intermediate insulating layer 28 is covered on the overall surface, a resist layer 35 is covered, a pattern is designed, and holes 29 corresponding to one region 22 and region 23 and a hole 30 corresponding to the hole 26 are precisely formed at the layer 35. Thereafter, an upper metallic wiring layer 32 connected to the metallic wiring layer 27 are covered while extending on the layer 28, these steps are repeated as required, thereby obtaining multilayer wiring structure. |
