发明名称 BIAS CONTROLLER AND SORTING CIRCUIT IN BIAS CONTROLLER
摘要 PURPOSE:To obtain a bias controller suitable for Adaptive Interference Suppression Filter(AISF) by outputting a channel control signal based on channel ID signals rearranged by a sorting section. CONSTITUTION:The bias controller of the AISF is provided with a channel data and channel ID latching section 31, a sorting section 32, an AISF control signal generating section 33, and a timing clock generating section 34. Then a bias shifting signal corresponding to the spectral intensity of each channel with a different center frequency outputted from the AISF is acquired as a digital data, the quantity of data is compared, channel ID signals representing the channel number in the order of the spectrum intensity to generate a AISF control signal. Thus, the bias control circuit suitable for the AISF is obtained.
申请公布号 JPH03174832(A) 申请公布日期 1991.07.30
申请号 JP19890313814 申请日期 1989.12.01
申请人 CLARION CO LTD 发明人 KURIHARA TAKAO
分类号 H03H9/64;H03H9/02;H04B1/10;H04B1/707;H04B1/71;H04J13/00;H04K3/00 主分类号 H03H9/64
代理机构 代理人
主权项
地址