发明名称 SERIAL/PARALLEL CONVERSION SYSTEM
摘要 PURPOSE:To make it completely unnecessary to use a clock signal for restoration processing by executing conversion processing by a converter provided with (n) signal detecting signals and restoring the converted signal into the original serial signal by a converter provided with a circuit for outputting the exclusive OR of all n-bit parallel signals inputted to the circuit. CONSTITUTION:Only when an input signal Din transits its state at the timing of each 2 bits from its initial one bit, a signal P1 also transits its own state with 2-bit delay. On the other hand, a signal P2 transits its own state with 2-bit delay only when the input signal Din transits its own state at the timing of each 2 bits from the 2nd one bit. A serial/parallel conversion circuit 1 converts the inputted serial signal Din into 2-bit parallel signals P1, P2 and outputs respective signals to transmission lines 2a, 2b. On the other hand, a parallel/serial conversion circuit 3 on the receiving side is constituted of only one exclusive OR circuit X10 connecting the transmission lines 2a, 2b to its input terminals.
申请公布号 JPH03175743(A) 申请公布日期 1991.07.30
申请号 JP19890314944 申请日期 1989.12.04
申请人 SUMITOMO ELECTRIC IND LTD 发明人 FUKUOKA TAKASHI
分类号 H03M9/00;H04L13/10 主分类号 H03M9/00
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