Video dot clock generator

摘要

A video dot clock generator includes a phase-locked loop (PLL) which includes a voltage controlled oscillator, a frequency divider, a phase comparator and a loop filter. The voltage controlled oscillator (VCO) is programmable to provide multiple frequency ranges for a given range of control voltages applied to the oscillator. The programming affects both the frequency range and the gain of the VCO. The phase comparator includes circuitry which simulates a predetermined minimum phase error which, when compensated for, substantially eliminates jitter in the dot clock signal. The frequency divider used in the PLL and a similar frequency divided used to generate the reference signals for the phase comparator are programmable via an internal memory which also holds programmable control signals for the VCO. The memory, in turn, may be programmed by the user to achieve desired frequency and loop again characteristics for a given application.