| 摘要 |
An image memory data processing control apparatus having an image memory unit divided into a plurality of block memories, for each of which each pixel register and each timing control means are disposed, whereby a high-speed data drawing may be made. When executing a bitblt processing, writing decoders and reading decoders select modules associated with the pixel registers concerned. Data are read out from the image memory unit and data obtained by a raster operation are written into the image memory unit.
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