发明名称 PACKET SWITCHING SYSTEM
摘要 <p>PURPOSE:To realize non-step or non-down without using redundancy constitution by attaining detouring transfer even if a fault occurs in a matrix-type packet changing-over switch. CONSTITUTION:When the buffer memory fault detection circuit 11 of a first packet transfer part 1 detects that a buffer memory 5 has a fault, an instruction altering a selection destination is generated to a buffer memory selecting circuit 10 and a detouring display means 13 is driven. Thus, the selection circuit 10 generates an output instructing the address of the memory 5 different from the original destination and a packet on which bypass display is added is transmitted to an input bus 3. When a detouring discrimination means 22 detects the detouring display of the reception packet in a second packet transfer part 2, the reception packet is transferred to the input packet holding part 12 of the first packet transfer part 1 through a detouring packet transfer means 24.</p>
申请公布号 JPH03175844(A) 申请公布日期 1991.07.30
申请号 JP19890315587 申请日期 1989.12.05
申请人 FUJITSU LTD 发明人 SAKAKAWA KAZUO
分类号 H04L12/56 主分类号 H04L12/56
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