发明名称 PLASTIC PACKAGE FOR SEMICONDUCTOR
摘要 PURPOSE:To reduce lead inductance of a multipin plastic package and to realize high-speed LSI performance without causing erroneous function by pasting a board having a wiring layer to at least on one side of a lead frame and then, connecting electrically the lead frame to the wiring layer in the board. CONSTITUTION:In a plastic package which uses a lead frame 3 and a mold resin 4, each board 5 having a wiring layer is pasted at least on one side of the lead frame 3 and the lead frame 3 is connected electrically to the wiring layer of the board 5. In this way, the lead frame 3 and a wire 2 are in existence between a semiconductor chip 1 and each outer lead and yet, as each board that is equipped with patterns of metallic conductors in parallel is connected to the lead frame 3, inductance in the lead frame becomes exceedingly low. Further, with the speeding-up of an LSI, although the change rate of output becomes rapid, the plastic package which takes out the performance of the high-speed LSI without giving rise to erroneous function is obtained by decreasing lead inductance.
申请公布号 JPH03175662(A) 申请公布日期 1991.07.30
申请号 JP19890316017 申请日期 1989.12.04
申请人 MITSUBISHI ELECTRIC CORP 发明人 NAKAMURA HIROTAKA
分类号 H01L23/50 主分类号 H01L23/50
代理机构 代理人
主权项
地址