| 摘要 |
PURPOSE:To attain sure data demodulation even when an output signal level of a correlation device is fluctuated by retarding an output of an absolute value detection circuit, comparing the retarded signal with a threshold level signal and generating a correlation pulse. CONSTITUTION:A delay circuit 11 uses a sampling signal (b) as a clock, an output (e) selected from an output (c) of an A/D conversion circuit 2 or an inversion circuit output (d) obtained by a selection circuit 4 is delayed by nearly one period of a clear signal (g). A comparator 8 compares an output (m) of the circuit 11 with a threshold level signal (j) of a threshold level setting circuit 7 and when the output (m) larger than the signal (j) is inputted, a correlation pulse (k) is outputted. Moreover, the most significant bit (f) of the output (C) is inputted to a delay circuit 12 and the polarity of correlation spike is discriminated by the outputted most significant bit (n). Thus, since the polarity is discriminated based on the amplitude information of the current correlation spike, even when the output signal level of the correlation device is fluctuated, the data is surely demodulated. |
