发明名称 IMAGE PROCESSOR
摘要 PURPOSE:To allow the execution of the software of a personal computer without emulation by providing a control circuit which has two memories and executes the control of frequencies at the time of writing and reading out and the timing adjustment of input and output. CONSTITUTION:The control circuit 6 which has at least the two memories to store one line selects the memories 8, 9 to execute the reading out and writing and writes low-resolution data at the dot clock synchronized with the horizontal and vertical synchronizing frequencies outputted by the low-resolution data at the time of writing of the data. The circuit reads out the data synchronized with the horizontal synchronizing frequency with which a display 7 of a high resolution, i.e. the output destination of images at n-times (n is >=2 natural number) at the time of the writing and outputs the one line of the same image n-times, thereby adjusting the timing of the input and output at the time of the reading out. The software of the personal computer is executed in a native mode in this way.
申请公布号 JPH03171087(A) 申请公布日期 1991.07.24
申请号 JP19890311183 申请日期 1989.11.30
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 YAMAGUCHI MASAFUMI;YAMADA TAKAHIRO
分类号 G09G5/12;G06T3/40;G09G5/00 主分类号 G09G5/12
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