发明名称 |
Static random access memory device with pull-down control circuit |
摘要 |
A static RAM includes a plurality of chips. The chips each comprise a plurality of memory cells for storing data, column-selecting transistors, bit-lines to which the plurality of memory cells and the column-selecting transistors are connected, and a voltage control circuit which can adjust the electrical potential of the bit-lines so as to allow the column-selecting transistors to operate when selecting one of the chips. By use of the voltage control circuit, the static RAM can operate at a high speed when not only address selecting operation but also chip selecting operation is required.
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申请公布号 |
US5034924(A) |
申请公布日期 |
1991.07.23 |
申请号 |
US19870067975 |
申请日期 |
1987.06.30 |
申请人 |
SONY CORPORATION |
发明人 |
TANIGUCHI, HITOSHI;ISHIO, KEISUKE |
分类号 |
G11C11/41;G11C7/12;G11C11/419 |
主分类号 |
G11C11/41 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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