发明名称 Signal processing circuit for multiplication
摘要 A multiplication processing circuit requiring no digital-analog converter includes a circuit for multiplying a digital multiplication coefficient by a digital multiplicand and outputting the result of multiplication as an analog current signal. The multiplication processing circuit includes a circuit for decoding the digital multiplication coefficient to generate one or a plurality of control signals, a circuit responsive to the digital multiplicand and to the generated control signal for generating a signal indicating, in decimal notation, the result of multiplication of the digital multiplication coefficient by the digital multiplicand, and a circuit for converting the signal indicating the result of multiplication into an analog current signal of a corresponding magnitude. Each of the control signals indicates at least one digital multiplication coefficient in decimal notation. The circuit for generating the signal indicative of the result of multiplication includes a circuit for logically processing, by logic gates, the control signal and the digital multiplicand. The logic gate circuit includes a circuit for detecting coincidence/non-coincidence between a pattern of the generated control signal and a bit pattern of the digital multiplicand, and a circuit responsive to the output of the detecting circuit for activating one of a plurality of possible signals indicating the results of multiplication.
申请公布号 US5034912(A) 申请公布日期 1991.07.23
申请号 US19900462379 申请日期 1990.01.09
申请人 MITSUBISHI DENKI KABUSHIKI KAISHA 发明人 TAKEUCHI, SUMITAKA;KOUNO, HIROYUKI
分类号 G06F7/53;G06F7/493;G06F7/52;G06F7/523;G06F17/10;G06J1/00;H03H17/02 主分类号 G06F7/53
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