发明名称
摘要 <p>PURPOSE:To attain the timer replacement with high efficiency for a circuit controller, etc. by storing only the significant timer information to a memory after deleting the undesired timer information with high efficiency. CONSTITUTION:When the timer information is replaced, a control circuit 4 checks whether or not the cancel information corresponding to the timer information is stored in a memory 6 by comparing the circuit numbers of both information with each other. If said cancel information is not stored, the timer information of a register 7 is replaced by a replacement circuit 8 and written again to the same address of a memory 1. When said cancel information is stored in the memory 6, the timer information is replaced by the circuit 8 and written to an address of the memory 1 indicated by a scan address register 5 at that time point (i.e., an address where the time information to be calcelled is so far stored). Then the contents of an address register 2 are set at -1, and the corresponding cancel information of the memory 6 is cleared. These said actions are carried out in order of the scans of the memory 1. As a result, the effective information are successively replaced to the area to be cancelled within the memory 1. Then the undesired timer information is deleted out of the memory 1.</p>
申请公布号 JPH0347538(B2) 申请公布日期 1991.07.19
申请号 JP19840036073 申请日期 1984.02.29
申请人 HITACHI SEISAKUSHO KK;NIPPON DENSHIN DENWA KK;NIPPON DENKI KK;FUJITSU KK 发明人 YANO JUNICHI;MARUYAMA MASATO;IKEDA YOSHINOBU;GOHARA MASAO
分类号 G06F11/30;G06F1/14;G06F11/00;G06F13/00 主分类号 G06F11/30
代理机构 代理人
主权项
地址