| 摘要 |
<p>PURPOSE:To eliminate the need for the rearrangement of conversion coefficients and to enable high-speed reverse orthogonal conversion by utilizing a matrix wherein column vectors are rearranged in the order of the transmitted conversion coefficients and controlling matrix arithmetic with the number of the conversion coefficients. CONSTITUTION:An address converter 12c is provided behind an address generator 12d instead of making the reverse zigzag scanning of conversion coefficients decoded by a decoder on a reception side. Then the column vectors in the reverse converted matrix are rearranged, and then the reverse orthogonal arithmetic is carried out in the order of the transmitted conversion coefficients. Further, an effective coefficient counter 12a which measures the number of the transmitted conversion coefficients is provided and the frequency of the calculation of the product of sums in the matrix arithmetic is controlled according to the counted number. Consequently, the order of the transmitted conversion coefficients need not be changed and the calculation of the sum of products in the matrix arithmetic is discontinued, so the high-speed software processing is attained.</p> |
