发明名称 CLOCK SELECTION SWITCHING SYSTEM
摘要 <p>PURPOSE:To suppress harmful clock selection changeover by the state of 'active system clock interrupt, standby system normality' momentarily by inhibiting the changeover within a prescribed time after production of clock input interrupt only at either of 0 or 1 system. CONSTITUTION:A switching control circuit 5 forms a means selecting a standby system when clock input interrupt of an active system is caused and the standby system is normal and a both-system alarm generation detection circuit 3 and the switching control circuit 5 form a means inhibiting the changeover when clock input interrupt is caused in both the 0/1 systems. Furthermore, an exclusive OR circuit 4, the switching control circuit 5 and a switching protection timer circuit 6 form a means inhibiting the changeover within a prescribed time after the occurrence of clock input interrupt in either of the 0/1 systems. Thus, when the alarm of the active system is especially caused early in the momentary clock input interrupt, the harmful clock selection switching due to tentative 'active system clock interrupt, standby system normality' is suppressed.</p>
申请公布号 JPH03165134(A) 申请公布日期 1991.07.17
申请号 JP19890303218 申请日期 1989.11.24
申请人 NEC CORP 发明人 KOBAYASHI MASATO
分类号 G06F1/04;H04L7/00 主分类号 G06F1/04
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