发明名称 |
Peak value hold circuit for video processing in scanner, - suppresses abnormal bit effects using peak value hold register, and compares with input signal |
摘要 |
The peak value hold circuit contains a peak value hold register (17) for holding an instantaneous peak value and an operation device (18) which compares the instantaneous peak vlaue with an input signal. The operation device performs an operation on th epeak value and input signal when the input signal is greater than the peak value so that the peak value is replaced in the hold register. ADVANTAGE - Suppresses effects of occurrence of one or more abnormal bits.
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申请公布号 |
DE4100264(A1) |
申请公布日期 |
1991.07.11 |
申请号 |
DE19914100264 |
申请日期 |
1991.01.07 |
申请人 |
RICOH CO., LTD., TOKIO/TOKYO, JP |
发明人 |
KUDOSE, HIROYUKI, ISEHARA, KANAGAWA, JP |
分类号 |
H04N1/19;G01R19/04;H04N1/403 |
主分类号 |
H04N1/19 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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