| 摘要 |
<p>PURPOSE:To rapidly execute clear processing by allowing a subtractor to forced ly output '0' when an XC'0' clear instruction is detected by an SS type instruc tion. CONSTITUTION:An XC'0' clear detecting circuit 10 for detecting the contents of an SS type instruction (XC instruction) having the specification of exclusive OR indicate memory '0' clear for storing '0' data in a storage area is con nected. When the contents of the XC instruction are not memory '0' clear, the instruction is executed by normal processing, and when the contents of the XC instruction are memory '0' clear, the 2nd operand reading stage is suppressed, the same data are simultaneously set up in the 1st and 2nd operand work registers 31, 32 and the instruction is executed so that '0' data to be the computed result is stored in an operand storing area. Thereby, the XC'0' clear processing using the SS type instruction can be executed at one cycle pitch. Thus, the processing can be rapidly executed.</p> |
