Generating sinusoidal signals using analogue partial signals - formed in divider and clock-controlled tapping switches feedline signals in sequence to adder

摘要

Generating a sinusoidal signal involvesa using functionally valid analogue partial signals formed in a divider circuit and fed to an adder circuit under clock control by tapping switches. Each group of successive partial signals is actively switched in parallel by a group of tapping switches. The tapping switch configuration is incremented under clock control by simultaneously switching several switches to the next partial signal in sequence. The number of switches connected to the adder is held constant. USE/ADVANTAGE - Digitally frequency-controlled sine function generators for accurate sinusoid formation, eliminating temp and frequency dependent phase errors.