SEMICONDUCTOR DEVICE AND MANUFACTURE THEREOF

摘要

PURPOSE:To form a wiring layer having a fine pattern without generating the blooming of an exposure device by flattening the surface of an interlayer insulating layer covering various semiconductor elements formed onto the surface of a semiconductor substrate. CONSTITUTION:A memory cell region 3 on the surface of a semiconductor substrate 1 and the top face of a peripheral region 4 are coated with an interlayer insulating layer 23 in thick film thickness. The interlayer insulating layer 23 is shaped while completely covering the top face of a cylindrical stacked capacitor formed in high height in the vertical upper section of the surface of the semiconductor substrate 1. The surface of the interlayer insulating layer 23 is shaped equally and flatly in the upper sections of the memory cell region 3 and the peripheral region 4. A contact hole 20 reaching one impurity region 9 of the MOS transistor 5 of a memory cell is formed into the interlayer insulating layer 23. A bit line 22 is shaped into the contact hole 20 and onto the flat surface of the interlayer insulating layer 23.