BUFFER CONTROL CIRCUIT FOR MULTI-LAYER SIMULTANEOUS RECEPTION,申请号JP19890295233-传众专利搜索

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发明名称	BUFFER CONTROL CIRCUIT FOR MULTI-LAYER SIMULTANEOUS RECEPTION
摘要
申请公布号	JPH03155234(A)	申请公布日期	1991.07.03
申请号	JP19890295233	申请日期	1989.11.14
申请人	FUJITSU LTD	发明人	NISHIDA MITSUHIRO
分类号	H04J3/00;H04L13/08	主分类号	H04J3/00
代理机构		代理人
主权项
地址

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