| 摘要 |
<p>The following means is adopted in order to develop the impact ionization phenomenon, that has been observed only when the channel length is short and the power source voltage is high, even under the condition of a low power source voltage and a long channel length. First, the impurity concentration is increased in the semiconductor region to decrease the width of the depletion layer between the drain and the substrate. Accordingly, the impact ionization phenomenon takes place sufficiently even when the drain voltage VD is lower than 5V. Secondly, a high-resistance layer is interposed between the semiconductor region and the substrate electrode so that holes or electrons accumulate in the substrate. Hence, minority carriers are injected from the source. Thirdly, in order to prevent Vth from rising as a result of using the semiconductor substrate having a high impurity concentration, a low impurity concentration region is formed on the substrate surface to use it as a channel.</p> |
