| 摘要 |
PURPOSE:To increase the speed of operation and lower the consumption power ratio by providing a means which selects different potentials and drives a cell block selecting means, an I/O line, a low decoder, a column decoder, a data buffer, and a bit line I/O line. CONSTITUTION:A buffer 211 which possesses an I/O sense amplifier 111 are connected to I/O01, -I/O01 common to cell blocks CA0, CA1. A first pre-charger 131 which makes the I/O line pair to (1/2)Vcc as same as bit lines BL pair, and a second pre-charger 121 which make them Vcc are provided in a buffer 211. An I/O control circuit 141 selects and drives this I/O buffer 211 by a precharge control signal CEQ and a sense control signal. Selection signals -BSL1, -BSL0 are inputted to the control circuit 141, and when the CA0 or the CA1 are selected, precharger 131, 121 are turned on and off selectively and executes a (1/2)Vcc precharge, the standard potential of the sense amplifier 111 rises to Vcc, and the I/O line pair is also precharged to Vcc. |
