Data protection circuit for memory contents - alters at least one section of each stored data entry

摘要

The data protection circuit divides each individual memory entry into at least two sections, with the data in at least one section being altered. The data written in a given data section (EA) is first fed to a register (AREG) and data held in a different register (NREG) is entered in the data section (EA). Both registers (AREG,NREG) are coupled to a combining logic (GEN) in turn coupled to an Exclusive-OR circuit (EXOR1,EXOR2) providing a check element (CHKN) for the new data. ADVANTAGE - Prevents unauthorised access to stored data.