| 摘要 |
<p>The converter is comprised of a memory (SRAM) having a first port and a second port, a managing circuit for the first port (SPM) connected to the first port, to an incoming synchronous multiplex line (ME) and to an outgoing synchronous multiplex line (MS), and a circuit for managing the second port (APM) connected to the second port, to an incoming asynchronous link (LE) through a FIFO type cell memory (M), and to an outgoing asynchronous link (LS). A control unit (MF) external to the converter, and applied to the port managing circuits, allows to choose the mode of operation of the converter; in a first mode (M32), each time interval of a raster of a synchronous multiplex is affected to communication channel, and in a second mode (M1) all time intervals of a synchronous raster are affected to a channel.</p> |
