| 摘要 |
A current control circuit for a circuit board carrying a parallel circuit comprising an input capacitor (Cb) shunted by an electronic circuit (IC) constituted by CMOS devices which do not dissipate power as long as no clock signal (CK) is applied to them. This control circuit limits voltage variations across other parallel circuits on other circuit boards already coupled to a power supply (PS), i.e. with charged input capacitors, when the present circuit board is newly coupled to this power supply or source. This is done by first intercoupling the parallel circuit and the source via a resistance and meanwhile preventing the clock signal (CK) from being applied to the electronic circuit (IC), and by allowing this clock signal to be applied to the electronic circuit (IC) during gradually increasing time periods (Th) after the resistance has been short-circuited. |
