发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PURPOSE:To effectively suppress change of internal source voltage when a large-current-consuming circuit is operated by installing voltage lowering means to lower than external source voltage supplied from the outside of a chip and supply the lowered voltage into the chip as the internal source voltage in each semiconductor circuit block. CONSTITUTION:A plurality of voltage lowering means A1-An to lower the external source voltage Vcc supplied from the outside of a chip and supply the lowered voltage into the chip as internal source voltage VINT1-VINTn are installed in semiconductor circuit blocks C11-C1n respectively. For example, the voltage lowering means A1-An (A11-A1n) of the semiconductor circuit blocks C11-C1n each have at least one MOS transistor. The sources of the MOS transistors are connected to an external power source pad 10 by common connection with a first common line L1 an the gates of the MOS transistors are connected to the pad 10 by common connection with a second common line L2.
申请公布号 JPH03149867(A) 申请公布日期 1991.06.26
申请号 JP19890289118 申请日期 1989.11.07
申请人 FUJITSU LTD;FUJITSU VLSI LTD 发明人 NAKANO TOMIO;KATO KOJI;NOMURA HIDENORI
分类号 H01L21/822;G11C11/401;G11C11/407;H01L21/8242;H01L27/02;H01L27/04;H01L27/10;H01L27/108 主分类号 H01L21/822
代理机构 代理人
主权项
地址