| 摘要 |
PURPOSE:To reduce the jitter of a clock by superposing the differential waveform of one input signal on the other input signal of an edge type phase comparator perform the phase comparison. CONSTITUTION:The differential waveform of one input signal is superposed on the other input signal of an edge type phase comparator 7 to perform the phase comparison. That is, the differential waveform of a pulse P4 is superposed on a pulse P2 and the differential waveform of the pulse P2 is superposed on the pulse P4, and thereby, signals SA and SB have the same phase. Therefore, a wider and continuous dead zone area compared with a narrow and discontinuous dead zone area is equivalently set as the characteristic of the edge type phase comparator 7. Thus, the jitter of the clock is reduced. |
