| 摘要 |
A serial bus interface includes a shift register for receiving and transmitting serial data, a first selector coupled to a serial input of the shift register selectively coupling the serial input of the shift register to either of two serial data lines, and a second selector coupled to a serial output of the shift register selectively coupling the serial output of the shift register to one of the two serial data lines. A clock generator, capable of generating a clock pulse in two different formats, is coupled to a clock line. The clock generator operates to output to the clock line a clock pulse in accordance with a format utilized by one of the serial data lines.
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