发明名称 SEMICONDUCTOR MEMORY CIRCUIT
摘要 PURPOSE:To suppress an ON-ON power supply current, which flows when a serial buffer is inverted, to be low by connecting the input gate of a first transistor to a digit line, connecting the input gate of a second transistor to a selecting signal line and connecting the input gate of a third transistor to a precharge control signal line. CONSTITUTION:A digital line D' goes to High at first and an N-type transistor Q2 is turned ON. Then, low is supplied to the source of an N-type data transfer transistor Q1. At this time, since a precharge control signal phi2 is made Low and a P-type precharge transistor Q3 is turned ON, a serial data bus B is precharged to be High. After the precharge operation, a selecting signal phi1 is made High and the N-type data transfer transistor Q1 is turned ON. Then, the charge of the serial data bus B is discharged and the serial data bus is made Low. Thus, since only a data register driver selected by the selecting signal is activated, the ON-ON power supply current can be suppressed to be low.
申请公布号 JPH03142780(A) 申请公布日期 1991.06.18
申请号 JP19890281062 申请日期 1989.10.27
申请人 NEC IC MICROCOMPUT SYST LTD 发明人 MATSUKI KAZUHIKO
分类号 G11C11/409;G11C8/04;G11C11/401;H01L21/8242;H01L27/108 主分类号 G11C11/409
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