| 摘要 |
PURPOSE:To attain the correct adverse assembling display of the trace result by providing a generating circuit for information showing the start or an interruption of a tracing operation and simultaneously storing the information in a trace memory at restart of the tracing operation. CONSTITUTION:A debugging device has a trace memory TM which contains a microprocessor MPU of the same type as the microprocessor of a user system USE to be debugged to emulate the system USE and also to sequentially acquire the state of a bus BUS under emulation or the input/output state of the MPU..A generating circuit TDG is provided to the debugging state to generate the information showing the start or an interruption of a tracing operation. Simultaneously, the trace start or interruption information is stored in the memory TM together with the trace information at restart of the tracing operation. In such a constitution, the data are acquired in an optional timing and the correct adverse assembling display can be carried out despite no continuity secured to the contents of the acquired data. |
